1. Technical Field
The present invention relates to ferroelectric capacitors and ferroelectric memories.
2. Related Art
Ferroelectric memories are characterized by nonvolatility, high-speed wiring and reading, and low power consumption, and are one of powerful representatives as a next-generation nonvolatile memory. The most popular structures of ferroelectric memories are 1T1C types. In the stacked type structure among the 1T1C types, a lower electrode of a ferroelectric capacitor is connected to a plug electrode for electrically connecting the ferroelectric capacitor to a transistor, and it is important to secure the electrical conduction between the lower electrode and the plug electrode. For example, Japanese laid-open patent application JP-A-2004-31533 proposes the use of a Ir or Ir oxide layer as a buffer layer between a Pt lower electrode and a W plug in a stacked type ferroelectric memory.
However, when Ir or Ir oxide is used as a buffer layer, the ferroelectric material on the Pt electrode may have random orientations, and the control of its orientation may be difficult. On the other hand, when Ti or Ti oxide that excels in controlling the orientation of ferroelectric material is used as a buffer layer, the buffer layer may have higher resistance as a result of oxidation and loss of conductivity, and it is difficult to secure the conductivity between the ferroelectric capacitor and the plug electrode.